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ultralow power +3.3 v, rs-232 notebook pc serial port drivers/receivers adm560/adm561 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features rs-232 compatible operates with 3 v or 5 v logic ultralow power cmos: 1.3 ma operation low power shutdown: 0.2 a suitable for serial port mice 116 kbps data rate 1 f charge pump capacitors single +3 v to +3.6 v power supply two receivers active in shutdown (adm560) applications notebook computers peripherals modems printers battery-operated equipment functional block diagram 7 16 15 14 12 13 17 11 t1 2 t1 in t1 out 6 t2 3 t2 in t2 out 20 t3 1 t3 in t3 out 24 21 t4 28 t4 in t4 out r1 9 r1 out r1 in 8 r2 4 r2 out r2 in 5 r3 27 r3 out r3 in 26 r4 23 r4 out r4 in 22 r5 18 25 r5 out r5 in shdn (adm561) 19 10 c1+ c1? c2+ v cc v+ v? c2? + + + + gnd +3.3v to +6.6v voltage doubler +6.6v to ?6.6v voltage inverter 0.1f c3 1f 6.3v 1f 10v 1f 10v c4 1f 10v eia/tia-232 outputs eia/tia-232 inputs shdn (adm560) adm560/ adm561 +3.3v input cmos inputs cmos outputs en (adm560) en (adm561) 05667-001 figure 1. general description the adm560/adm561 are four driver/five receiver interface devices designed to meet the eia-232 standard and operate with a single +3.3 v power supply. the devices feature an on-board dc-to-dc converter, eliminating the need for dual 5 v power supplies. this dc-to-dc converter contains a voltage doubler and voltage inverter, both of which internally generate 6.6 v from the input +3.3 v power supply. the adm560 and the adm561 consume only 5 mw making them ideally suited for battery and other power-sensitive appli- cations. a shutdown facility is also provided to reduce the power to 0.66 w. the adm560 contains active low shutdown and an active high receiver enable signal. in shutdown mode, two receivers remain active, thereby allowing monitoring of peripheral devices. this feature allows the device to be shut down until a peripheral device begins communication. the active receivers alert the processor, and then take the adm560 out of shutdown mode. the adm561 features active high shutdown and an active low receiver enable. in this device, all receivers are disabled in shutdown. the adm560/adm561 are fabricated using cmos technology for minimal power consumption. they feature a high level of over-voltage protection and latch-up immunity. the receiver inputs can withstand up to 25 v levels. the transmitter inputs can be driven from either 3 v or 5 v logic levels. this allows operation in mixed 3 v/5 v power supply systems. the adm560/adm561 are packaged in a 28-lead soic and a 28-lead ssop package.
adm560/adm561 rev. b | page 2 of 12 table of contents features .............................................................................................. 1 applications....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 4 esd caution.................................................................................. 4 pin configuration and function descriptions..............................5 typical performance characteristics ..............................................6 theory of operation .........................................................................8 circuit description .......................................................................8 enable and shutdown ...................................................................8 outline dimensions ..........................................................................9 ordering guide .......................................................................... 10 revision history 9/06rev. a to rev. b updated format..................................................................universal changes to specifications ................................................................ 3 10/05rev. 0 to rev. a updated format..................................................................universal changes to specifications ................................................................ 3 update to outline dimensions....................................................... 9 changes to ordering guide .......................................................... 10 7/94revision 0: initial version
adm560/adm561 rev. b | page 3 of 12 specifications v cc = +3.3 v 10%, c1 to c4 = 1 f, all specifications t min to t max , unless otherwise noted. table 1. parameter min typ max unit test conditions/comments output voltage swing 5.0 5.5 v v cc = 3.3 v, three transmitter outputs loaded with 3 k to ground 4 4.5 v v cc = 3.0 v, all transmitter outputs, loaded with 3 k to ground v cc power supply current 3.5 5 ma no load, t in = v cc 3.5 5 ma no load, t in = gnd shutdown supply current 0.2 5 a shdn = gnd (adm560), shdn = v cc (adm561), t in = v cc input logic threshold low, v inl 0.4 v t in , en, en , shdn, shdn input logic threshold high, v inh 2.4 v t in , en, en , shdn, shdn logic pull-up current 3 20 a t in = gnd eia-232 input voltage range C25 +25 v eia-232 input threshold low 0.4 0.8 v eia-232 input threshold high 1.1 2.4 v eia-232 input hysteresis 0.3 v eia-232 input resistance 3 5 7 k cmos output voltage low, v ol 0.4 v i out = 1.6 ma cmos output voltage high, v oh 2.8 v i out = ?40 ma cmos output leakage current +0.05 5 a en = v cc , en = gnd, 0 v r out v cc output enable time 100 ns output disable time 50 ns receiver propagation delay tphl 0.1 1 s tplh 0.5 2 s transition region slew rate 4.5 v/s r l = 3 k, c l = 2500 pf measured from +3 v to ?3 v or ?3 v to +3 v transmitter output resistance 300 v cc = v+ = v? = 0 v, v out = 2 v rs-232 output short-circuit current 10 ma
adm560/adm561 rev. b | page 4 of 12 absolute maximum ratings t a = 25c, unless otherwise noted. table 2. parameter rating v cc ?0.3 v to +6 v v+ (v cc ? 0.3 v) to +14 v v? +0.3 v to ?14 v input voltages t in ?0.3 v to (v+, +0.3 v) r in 25 v output voltages t out (v+, +0.3 v) to (v?, ?0.3 v) r out ?0.3 v to (v cc + 0.3 v) short-circuit duration t out continuous power dissipation ssop 900 mw soic 900 mw operating temperature range commercial (j version) 0c to +70c storage temperature range ?65c to +150c lead temperature (soldering, 10 sec) +300c esd rating >2000 v stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution esd (electrostatic discharge) sensitive device. electros tatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
adm560/adm561 rev. b | page 5 of 12 pin configuration and fu nction descriptions t3 out 1 t1 out 2 t2 out 3 r2 in 4 t4 out 28 r3 in 27 r3 out 26 shdn 25 r2 out 5 t2 in 6 t1 in 7 en 24 r4 in 23 r4 out 22 r1 out 8 t4 in 21 r1 in 9 t3 in 20 gnd 10 r5 out 19 v cc 11 r5 in 18 c1+ 12 v? 17 v+ 13 c2? 16 c1? 14 c2+ 15 adm560 top view (not to scale) 05667-002 t3 out 1 t1 out 2 t2 out 3 r2 in 4 t4 out 28 r3 in 27 r3 out 26 shdn 25 r2 out 5 t2 in 6 t1 in 7 en 24 r4 in 23 r4 out 22 r1 out 8 t4 in 21 r1 in 9 t3 in 20 gnd 10 r5 out 19 v cc 11 r5 in 18 c1+ 12 v? 17 v+ 13 c2? 16 c1? 14 c2+ 15 adm561 top view (not to scale) 05667-012 figure 2.adm560 pin configuration fi gure 3. adm561 pin configuration table 3. pin function descriptions pin no. mnemonic description 2, 3, 1, 28 t1 out to t4 out transmitter (driver) outputs. typically 6 v. 9, 4, 27, 23, 18 r1 in to r5 in receiver inputs. these inputs accept rs-232 signal leve ls. an internal 5 k pull-down resistor to gnd is connected on each of these inputs. 8, 5, 26, 22, 19 r1 out to r5 out receiver outputs. these are 3 v logic levels. 7, 6, 20, 21 t1 in to t4 in transmitter (driver) inputs. these inputs accept 3 v or 5 v logic levels. an internal 400 k pull-up resistor to v cc is connected on each input. 10 gnd ground pin. must be connected to 0 v. 11 v cc power supply input 3.3 v 10%. 12, 14 c1+, c1? external capacitor 1 is connected between these pins. 13 v+ internally generated positive supply. +6.6 v nominal. 15, 16 c2+, c2? external capacitor 2 is connected between these pins. 17 v? internally generated negative supply. ?6.6 v nominal. 24 en/ en receiver enable. en, active high on adm560. en , active low on adm561. refer to table 4 . 25 shdn /shdn shutdown control. shdn , active low on adm560. shdn, active high on adm561. refer to table 4 . table 4. adm560/adm561 enable and shutdown control adm560 adm561 shdn = 1 shdn = 0 en = 1; receivers active en = 0; receivers active normal operation en = 0; receivers inactive en = 1; receivers inactive shdn = 0 shdn = 1 en = 1; receiver r1 to receiver r3 inactive en = 0; receivers inactive en = 1; receiver r4 and receiver r5 active en = 1; receivers inactive shutdown mode en = 0; receiver r1 to receiver r5 inactive
adm560/adm561 rev. b | page 6 of 12 typical performance characteristics 05667-005 6 0 3000 3 1 500 2 0 5 4 2500 2000 1500 1000 load capacitance (pf) v oh (v) 20kbps 80kbps 160kbps t a = 25c v cc = 3.3v 4 transmitters loaded with r l = 5k ? || c l c1 to c4 = 1f figure 4. transmitter output vo ltage high vs. load capacitance 05667-006 6.25 4.75 5 5.25 0 5.75 34 2 1 | i out | (ma) | t out | (v) t a = 25c c1 to c4 = 1f v cc = 3.3v transmitters unloaded t out low t out high figure 5. transmitter output voltage vs. load current 05667-007 10.5 3.5 5.5 5.5 2.5 7.5 6.5 8.5 9.5 5.0 4.5 4.0 3.5 3.0 4.5 v cc (v) v oh (v) t a = 25c c1 to c4 = 1f transmitters loaded with 5k ? || 2500pf 1 transmitter loaded 4 transmitters loaded figure 6. transmitter output voltage high vs. v cc 05667-008 0 ?6 3000 ?3 ?5 500 ?4 0 ?1 ?2 2500 2000 1500 1000 load capacitance (pf) v ol (v) 80kbps 160kbps 20kbps t a = 25c v cc = 3.3v 4 transmitters loaded with r l = 5k ? || c l c1 to c4 = 1f figure 7. transmitter output voltage low vs. load capacitance 05667-009 45 0 3000 500 2500 2000 1500 1000 load capacitance (pf) slew r a te (v/s) 40 35 30 25 20 15 10 5 3 transmitters loaded 4 transmitters loaded figure 8. transmitter slew rate vs. load capacitance 05667-010 ? 3 ?10 5.5 ?7 ?9 3.0 ?8 2.5 ?4 ?6 ?5 5.0 4.5 4.0 3.5 v cc (v) v ol (v) 4 transmitters loaded 1 transmitter loaded t a = 25c c1 to c4 = 1f transmitters loaded with 5k ? || 2500pf figure 9. transmitter output voltage low vs. v cc
adm560/adm561 rev. b | page 7 of 12 05667-011 10 ?10 ?5 0 0 5 20 15 13 10 5 25 current (ma) output voltage v+, v? (v) v? loaded no load on v+ v+ loaded no load on v? v+ and v? equally loaded t a = 25c v cc = 3.3v c1 to c4 = 1f all transmitters unloaded figure 10. v+, v? vs. load current
adm560/adm561 rev. b | page 8 of 12 theory of operation the adm560/adm561 are rs-232 transmission line drivers/ receivers, and operate from a single +3.3 v supply. this is achieved by integrating step-up voltage converters and level shifting trans- mitters and receivers onto the same chip. cmos technology is used to keep the power dissipation at an absolute minimum. the adm560/adm561 are a modification, enhancement, and improvement to the adm241l family and its derivatives thereof. these devices are essentially plug-in compatible and do not have materially different applications. the adm560/adm561 contain an internal voltage doubler and a voltage inverter that generates 6.6 v from the +3.3 v input. four external 1 f capacitors are required for the inter- nal voltage converters. circuit description the internal circuitry consists of three main sections. these are as follows: ? a charge pump voltage converter. ? 3 v logic to eia-232 transmitters. ? eia-232 to 3 v logic receivers. charge pump dc-to-dc voltage converter the charge pump voltage converter consists of an oscillator and a switching matrix. the converter generates a 6.6 v supply from the input +3.3 v level. this is done in two stages using a switched capacitor technique (see figure 11 and figure 12 ). first, the +3.3 v input supply is doubled to +6.6 v using capacitor c1 as the charge storage element. the +6.6 v level is then inverted to generate ?6.6 v using capacitor c2 as the storage element. capacitor c3 and capacitor c4 are used to reduce the output ripple. their values are not critical and can be reduced if higher levels of ripple are acceptable. the c1 and c2 charge pump capac- itors can also be reduced at the expense of the higher output impedance on the v+ and v? supplies. the v+ and v? supplies are also used to power external circuitry if the current requirements are small. transmitter (driver) section the drivers convert 3 v or 5 v logic input levels into eia-232 output levels. with v cc = +3.3 v and driving an eia-232 load, the output voltage swing is typically 5.5 v. + c3 + c1 v cc gnd s1 s2 s3 s4 internal oscillator v+ = 2v cc v cc 05667-003 figure 11. charge pump voltage double operation + c4 + c2 v+ gnd s1 s2 s3 s4 internal oscillator gnd v? = ? (v+) from voltage doubler 05667-004 figure 12. charge pump voltage inverted operation unused inputs can be left unconnected as an internal 400 k pull-up resistor pulls them high forcing the outputs into a low state. the input pull-up resistors typically source 8 a when grounded, so connect unused inputs to v cc or leave unconnec- ted in order to minimize power consumption. receiver section the receivers are inverting level shifters; they accept eia-232 input levels and translate them into 3 v logic output levels. the inputs have internal 5 k pull-down resistors to ground and are also protected against overvoltages of up to 25 v. the guaranteed switching thresholds are 0.4 v minimum and 2.4 v maximum. unconnected inputs are pulled to 0 v by the internal 5 k pull- down resistor. this results in a logic 1 output level for unconnected inputs or for inputs connected to gnd. the receivers have a schmitt trigger input with a hysteresis level of 0.3 v. this ensures error-free reception for both noisy inputs and for inputs with slow transition times. enable and shutdown table 4 shows the truth table for the enable and shutdown control signals. when disabled all receivers are placed in a high impedance state. in shutdown, all transmitters are disa- bled and all receivers on the adm561 are disabled. on the adm560, receiver r4 and rece iver r5 remain enabled in shutdown.
adm560/adm561 rev. b | page 9 of 12 outline dimensions compliant to jedec standards mo-150-ah 060106-a 28 15 14 1 10.50 10.20 9.90 8.20 7.80 7.40 5.60 5.30 5.00 seating plane 0.05 min 0.65 bsc 2.00 max 0.38 0.22 coplanarity 0.10 1.85 1.75 1.65 0.25 0.09 0.95 0.75 0.55 8 4 0 figure 13. 28-lead shrink small outline package [ssop] (rs-28) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-013-ae 18.10 (0.7126) 17.70 (0.6969) 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0 . 7 5 ( 0 . 0 2 9 5 ) 0 . 2 5 ( 0 . 0 0 9 8 ) 45 1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) seating plane 8 0 28 15 14 1 1.27 (0.0500) bsc 060706-a figure 14. 28-lead standard small outline package [soic_w] wide body (rw-28) dimensions shown in millimeters and (inches)
adm560/adm561 rev. b | page 10 of 12 ordering guide model temperature range package description package option adm560jr 0c to +70c 28-lead standard small outline package [soic_w] rw-28 adm560jr-reel 0c to +70c 28-lead standard small outline package [soic_w] rw-28 adm560jrz 1 0c to +70c 28-lead standard small outline package [soic_w] rw-28 adm560jrz-reel 1 0c to +70c 28-lead standard small outline package [soic_w] rw-28 adm560jrs 0c to +70c 28-lead shrink small outline package [ssop] rs-28 adm560jrs-reel 0c to +70c 28-lead shri nk small outline package [ssop] rs-28 adm560jrsz 1 0c to +70c 28-lead shrink small outline package [ssop] rs-28 adm560jrsz-reel 1 0c to +70c 28-lead shrink small outline package [ssop] rs-28 adm561jr 0c to +70c 28-lead standard small outline package [soic_w] rw-28 ADM561JR-REEL 0c to +70c 28-lead standard small outline package [soic_w] rw-28 adm561jrz 1 0c to +70c 28-lead standard small outline package [soic_w] rw-28 adm561jrz-reel 1 0c to +70c 28-lead standard small outline package [soic_w] rw-28 adm561jrs 0c to +70c 28-lead shrink small outline package [ssop] rs-28 adm561jrs-reel 0c to +70c 28-lead shri nk small outline package [ssop] rs-28 adm561jrsz 1 0c to +70c 28-lead shrink small outline package [ssop] rs-28 adm561jrsz-reel 1 0c to +70c 28-lead shrink small outline package [ssop] rs-28 1 z = pb-free part.
adm560/adm561 rev. b | page 11 of 12 notes
adm560/adm561 rev. b | page 12 of 12 notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d05667-0-9/06(b)

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